Program at a Glance
Program > Program at a Glance
Feb. 24
(Mon.)
#210 #310 #606 #608
HIT
15:00-18:00 Short
Course 1
Short
Course 2
Short
Course 3
Short
Course 4
Feb. 25
(Tue.)
Room A Room C Room D Room E Room F Room G Room H Room I Room J Room K Room L Room M Room N
#612 #401 #402 #403 #404 #405 #407 #408 #501 #502 #503 #508-
509
Lobby
HIT Á¦ 1°øÇаü (Engineering Building I)
09:30-11:00 TC1-A TD1-P TE1-H TF1-L TG1-O ¡¡ TJ1-G TK1-K TL1-J Chip
Design
Contest
Àü½Ã
(Exhi-
bition)
Atomic
Layer
Depo-
sition
and
Silicides
Device
for
Energy
I
Display
and
Imager
Circuit
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¹×
È¥¼º
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1
VLSI
System Design
and
Applica-
tions I
Device Physics
&
Simulation
New
Memor-
ies
for
Neuro-
morphic
and
Recon-
figurable
Systems
Graph-
ene & 2D
11:00-11:10 Chip Design Contest Âü°ü (& Break)
11:10-12:40 TC2-A TD2-P TE2-H TF2-N TG2-O   TJ2-G TK2-K TL2-J
Plating
and
Reliability
Device
for
Energy
II
Display
Device
CAD &
Low
Power
VLSI
System Design
and
Applica-
tions II
Device
Simula-
tions/
Charac-
teri-
zation
3D
Memory
Tech-
niques
ReRAM
12:40-13:40 Á¡½É (Lunch)
13:40-14:10 Opening Ceremony / HIT Building, Room A (#612, 6F)
14:10-14:50 Plenary Talk I / HIT Building, Room A (#612, 6F)
14:50-15:30 Plenary Talk II / HIT Building, Room A (#612, 6F)
15:30-15:40 Chip Design Contest Âü°ü (& Break)
15:40-17:10 [Engineering Building II]
Rump Session 1(#301, 3F) / Rump Session 2(#302, 3F)
Rump Session 3(#401, 4F) / Rump Session 4(#402, 4F)
17:10-18:30 ¡¡ [TP1]
Poster 1
A, G, H,
K, L, P
¡¡
18:30-20:30 Á¦21ȸ Çѱ¹ ¹ÝµµÃ¼Çмú´ëȸ ȯ¿µ ¹× ¡°Ã¢Á¶°æÁ¦ ½ÇÇö À§ÇÑ À¶ÇչݵµÃ¼¡±¼±Æ÷½Ä
Feb. 26
(Wed.)
Room A Room C Room D Room E Room F Room G Room H Room I Room J Room K Room L Room M Room N
#612 #401 #402 #403 #404 #405 #407 #408 #501 #502 #503 #508-
509
Lobby
HIT Á¦ 1°øÇаü (Engineering Building I)
09:30-10:50 Á¦7Â÷ Interna-
tional
NVM Sympo-
sium
¡¡ »ê±âÆò
¹ÝµµÃ¼
°ü·Ã
»ç¾÷ ¼º°ú
¹ßǥȸ
[WP1]
Poster 2
B, C, F,
I, J
¡¡ ¡¡ Àü½Ã
(Exhi-
bition)
10:50-12:05 WC1-A WD1-B WE1-D WF1-E WG1-F   WJ1-G WK1-I WL1-J
High
Perfor-
mance
Mobile
Packa-
ging
Techn-
ology
Patterning Thin-
Film
Tran-
sistors
Com-
pound
Semi-
con-
ductor I
Emer-
ging
Device
Techn-
ologies
Thin-
Film
Transi-
stors/
Relia-
bility
Bio
Sensor
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±¸Á¶
12:05-13:05 Á¡½É (Lunch)
13:05-14:20 WC2-A WD2-C WE2-D WF2-E WG2-F ¹Ì·¡ºÎ
Frontier
»ç¾÷¼º°ú
º¸°í
  WJ2-M WK2-I WL2-J
3D &
2.5D
Packa-
ging
Techn-
ology
Nitride/
Gra-
phene Growth
and
Applica-
tions
Memory
Thin-
Film
Tech-
nologies
Com-
pound
Semi-
con-
ductor
II
Fin
FETs,
CIS and
Power
Devices
Wireless
Trans-
cover
Phy-
sical
Sen-
sors
³ª³ë
À¶ÇÕ
¼ÒÀÚ
14:20-14:30 ÈÞ½Ä (Break) ÈÞ½Ä (Break)
14:30-15:50 ¡¡ [WP2]
Poster 3
D, E,
M, Q
15:50-17:05 WC3-R WD3-C WE3-D WF3-E WG3-O   WJ3-N WK3-K WL3-J
Soft-
ware
Tech-
nique
for
Persi-
stent
Memory
Growth
of
Single
Cryst-
alline
Semi-
con-
ductor
Thin-Film
Process
Com-
pound Sem-
icon-
ductor
III
VLSI
System
Design
and
Applica-
tions III
Memory
&
Architec-
ture
Resi-
stive Memory
Devices
for
Cross-
Point
Array
¿¡³ÊÁö
17:05-17:15 ÈÞ½Ä (Break) ÈÞ½Ä (Break)
17:15-18:30 WC4-R WD4-Q ¡¡¡¡ WF4-L ¡¡¡¡   WJ4-N WK4-K ¡¡¡¡
Software
Tech-
nique
for
NAND
Flash
Based
Storage
Metro-
logy
and
Inspec-
tion
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Simula-
tion &
Testing
ReRAM Selec-
tors, PCRAM
Model,
and
DRAM
Macro
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WF3-E T È­¿äÀÏ C Room C 1 ù¹ø° A J
W ¼ö¿äÀÏ D Room D 2 µÎ¹ø° B K
¡¡ E Room E 3 ¼¼¹ø° C L
F Room F 4 ³×¹ø° D M
G Room G ¡¡ E N
J Room J F O
K Room K G P
L Room L H Q
¡¡ I R

* WF3-E : ¼ö¿äÀÏ Room F¿¡¼­ ¼¼¹ø°·Î ÁøÇàµÇ´Â EºÐ°ú ¼¼¼Ç
* WF3-E-2 : ¼ö¿äÀÏ Room F¿¡¼­ ¼¼¹ø°·Î ÁøÇàµÇ´Â EºÐ°ú ¼¼¼ÇÀÇ µÎ¹ø° ¹ßÇ¥
A   Interconnect & Package J   Nano-Science & Technology
B   Patterning K   Memory (Design &
  Process Technology)
C   Materials Growth &   Characterization L   Analog Design
D   Thin Film Process   Technology M   RF Design
E   Compound Semiconductors N   VLSI CAD
F   Silicon Device and   Integration Technology O   System LSI Design
G   Device & Process Modeling,
  Simulation and Reliability
P   Device for Energy
H   Display and Imaging
  Technologies
Q   Metrology, Inspection,
  and Yield Enhancement
I   MEMS & Sensors R   Semiconductor Software